Microprocessor & Microcontroller
(2020501) - Solved Exam Paper
Group (B)
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Q.2 Discuss the evolution of microprocessor in brief.
(माइक्रोप्रोसेसर के विकास की संक्षेप में वर्णन करें ।)
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The evolution of microprocessors is marked by increasing bit size, integration, speed, and complexity:
- 1st Gen (1971-72): 4-bit. Intel 4004, designed for calculators. PMOS technology.
- 2nd Gen (1973-78): 8-bit. Intel 8008, then the widely successful Intel 8080 and 8085, Zilog Z80, Motorola 6800. NMOS technology, faster. Used in early personal computers.
- 3rd Gen (1978-80): 16-bit. Intel 8086/8088 (used in IBM PC), Motorola 68000. HMOS technology. More memory addressing, faster execution.
- 4th Gen (1981-95): 32-bit. Intel 80386, 80486, Pentium series; Motorola 68020/30/40. HCMOS technology. Pipelining, on-chip cache, floating-point units introduced.
- 5th Gen (1995-Present): 64-bit. Intel Pentium Pro onwards (Core i-series, etc.), AMD Athlon/Ryzen, ARM processors. Multi-core architectures, advanced caching, low power consumption, specialized instructions (MMX, SSE, AVX). Dominant in PCs, servers, and mobile devices.
OR (अथवा)
Explain in brief the features of microcontrollers.
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Microcontrollers are essentially "computers-on-a-chip" designed for embedded control applications. Key features include:
- Integrated Components: Contains CPU, RAM, ROM/Flash (program memory), I/O ports, timers/counters, and often serial communication (UART), ADCs, DACs, all on a single chip.
- Application Specific: Designed to perform specific tasks repeatedly (e.g., control a washing machine, manage a car engine).
- Low Power Consumption: Optimized for battery-powered or low-power embedded systems.
- Bit Handling: Often have specialized instructions for bit-level manipulation, useful for control tasks.
- Real-Time Control: Built-in timers and interrupt systems facilitate real-time operation.
- Cost-Effective: High integration leads to lower system cost compared to microprocessor-based designs.
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Q.3 Compare between microprocessor and microcontroller.
(माइक्रोप्रोसेसर एवं माइक्रोकन्ट्रोलर के बीच तुलना करें ।)
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Feature Microprocessor (µP) Microcontroller (µC) Core Component CPU only (processing unit). CPU, RAM, ROM, I/O, Timers etc. on one chip. External Components Requires external RAM, ROM, I/O ports. Minimal external components needed. System Size/Cost Larger, higher cost system. Smaller, lower cost system. Application General purpose computing (PCs, Laptops). Specific embedded control tasks (Appliances, Automotive). Power Consumption Higher. Lower (often battery-powered). Processing Power Generally higher. Generally lower, optimized for control.
OR (अर्थवा)
Write down the differences between volatile and non-volatile memory.
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Feature Volatile Memory Non-Volatile Memory Data Retention Loses data when power is turned off. Retains data even when power is off. Primary Use Main memory (working memory) for active programs and data. Permanent storage for OS, firmware, user files. Speed Faster access times. Slower access times. Cost Generally more expensive per bit. Generally cheaper per bit. Examples RAM (SRAM, DRAM). ROM, PROM, EPROM, EEPROM, Flash Memory, Hard Disk Drives (HDD), Solid State Drives (SSD). -
Q.4 How many interrupts are present in 8051 microcontroller? Describe in brief.
(8051 माइक्रोकन्ट्रोलर में कितने इन्टरप्टस् है। संक्षेप में वर्णन करें | )
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The standard 8051 microcontroller has 5 interrupt sources:
- External Interrupt 0 (IE0): Triggered by a signal on the INT0 pin (P3.2). Can be level or edge-triggered. Highest default priority.
- Timer 0 Overflow (TF0): Triggered when Timer 0 overflows (rolls over from its maximum count to 0).
- External Interrupt 1 (IE1): Triggered by a signal on the INT1 pin (P3.3). Can be level or edge-triggered.
- Timer 1 Overflow (TF1): Triggered when Timer 1 overflows.
- Serial Port Interrupt (RI/TI): Triggered either when a byte is fully received (RI flag set) or when a byte has been fully transmitted (TI flag set). Lowest default priority.
These interrupts allow the microcontroller to respond to events asynchronously without constantly polling for them.
OR (अथवा)
Write the different addressing modes of 8051 micro controllers. Explain any two of them.
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The 8051 microcontroller supports several addressing modes:
- Immediate Addressing: The data operand is a constant value specified directly in the instruction.
Example:MOV A, #25H(Moves the value 25 Hex into Accumulator A). - Register Addressing: The operand is the content of a specific register (A, B, R0-R7, DPTR).
Example:MOV A, R5(Moves the content of register R5 into Accumulator A). - Direct Addressing: The operand's address (internal RAM or SFR) is specified directly in the instruction. Only addresses 00H to FFH can be accessed this way.
Example:MOV A, 30H(Moves the content of internal RAM location 30 Hex into Accumulator A). - Indirect Addressing: The instruction uses a register (R0 or R1 for internal RAM, DPTR for external memory) which holds the *address* of the operand. The '@' symbol indicates indirect addressing.
Example:MOV A, @R0(Moves the content of the internal RAM location *pointed to* by register R0 into Accumulator A). - Indexed Addressing: Used for accessing data in program memory (code space), typically lookup tables. The address is formed by adding the Accumulator (A) to either DPTR or the Program Counter (PC).
Example:MOVC A, @A+DPTR(Moves a byte from program memory, address = DPTR + A, into Accumulator A).
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Q.5 Write down the different control pins of the 8085 microprocessor and discuss the use of each signal pin.
(8085 माइक्रोप्रोसेसर के विभिन्न कन्ट्रोल सिग्नल पिन के नाम लिखें एवं प्रत्येक सिग्नल पिन के उपयोग का वर्णन करें ।)
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Key control pins of the 8085 microprocessor:
- ALE (Address Latch Enable): Output signal. Goes high during the first clock cycle (T-state) of a machine cycle to indicate that the AD0-AD7 lines contain the lower 8 bits of the memory/IO address. Used to latch this address externally.
- RD (Read): Output signal, active low. Indicates that the selected memory or I/O device is to be read and data is available on the data bus.
- WR (Write): Output signal, active low. Indicates that the data on the data bus is to be written into the selected memory or I/O location.
- IO/M: Output signal. Distinguishes between Memory (IO/M=0) and I/O (IO/M=1) operations. Used with RD and WR to generate specific memory/IO read/write control signals.
- S0, S1: Output signals. Indicate the type of machine cycle currently in progress (e.g., Opcode Fetch, Memory Read, Memory Write, I/O Read, I/O Write, Interrupt Acknowledge).
- READY: Input signal, active high. Used by slow peripherals to request wait states from the microprocessor. If READY is low, the CPU waits.
- HOLD: Input signal, active high. Used by external devices (like DMA controller) to request control of the address and data buses.
- HLDA (Hold Acknowledge): Output signal, active high. Acknowledges the HOLD request, indicating that the CPU has relinquished control of the buses.
- INTR (Interrupt Request): Input signal, level-triggered. General purpose interrupt request.
- INTA (Interrupt Acknowledge): Output signal, active low. Acknowledges an INTR request.
- RST 7.5, RST 6.5, RST 5.5: Input signals. Restart interrupts with specific vector addresses and priorities (RST 7.5 is edge-triggered, others are level-triggered).
- TRAP: Input signal. Non-maskable interrupt with the highest priority. Edge and level triggered.
- RESET IN: Input signal, active low. Resets the microprocessor.
- RESET OUT: Output signal, active high. Indicates the CPU is being reset; used to reset peripheral devices.
OR (अथवा)
Write an assembly language program that subtracts 40 H from 50 H.
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Assuming 8051 assembly language:
ORG 00H ; Start program at address 0 MOV A, #50H ; Load the minuend (50H) into the Accumulator MOV B, #40H ; Load the subtrahend (40H) into register B SUBB A, B ; Subtract B from A (A = A - B). SUBB also subtracts the Carry flag, ; but since we haven't set it, it acts like SUB. ; Result (10H) will be stored in Accumulator A. HERE: SJMP HERE ; Infinite loop to halt the program END ; End of programAlternatively, using immediate subtraction:
ORG 00H ; Start program at address 0 MOV A, #50H ; Load the minuend (50H) into the Accumulator SUBB A, #40H ; Subtract the immediate value 40H from A. ; Result (10H) will be stored in Accumulator A. HERE: SJMP HERE ; Infinite loop to halt the program END ; End of program -
Q.6 Explain the following instructions in 8051 micro controllers: - INCA, SCON.
(8051 माइक्रोकन्ट्रोलर के निम्नलिखित अनुदेशों की व्याख्या करें -INCA, SCON.)
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1. INC A (Increment Accumulator):
- Operation: Adds 1 to the current value stored in the Accumulator (A).
- Syntax:
INC A - Addressing Mode: Register addressing (operand is implied register A).
- Bytes: 1 byte instruction.
- Flags Affected: Does NOT affect the Carry flag (CY). Can affect AC, OV, P flags depending on the result.
- Example: If A = 2FH, after
INC A, A will be 30H. If A = FFH, afterINC A, A will be 00H (rolls over).
2. SCON (Serial Control Register):
- Operation: SCON is not an instruction, but a Special Function Register (SFR) located at address 98H. It is used to configure the operation mode of the 8051's built-in serial port (UART) and holds status flags related to serial communication.
- Bits: It is an 8-bit register. Key bits include:
SM0, SM1:Select the serial mode (Mode 0, 1, 2, or 3).REN:Receive Enable bit. Set to 1 to allow reception.TI:Transmit Interrupt flag. Set by hardware when transmission of a byte is complete. Must be cleared by software.RI:Receive Interrupt flag. Set by hardware when reception of a byte is complete. Must be cleared by software.
- Access: Accessed using direct addressing like other SFRs.
- Example:
MOV SCON, #50Hconfigures the serial port for Mode 1 (8-bit UART, variable baud rate) and enables reception (REN=1).
OR (अथवा)
Explain in brief different power saving modes used in 8051 microcontroller.
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The standard 8051 microcontroller (specifically variants like the 80C51) typically supports two main power-saving modes, controlled via the PCON (Power Control) register:
- Idle Mode:
- Entered by setting the IDL bit in PCON.
- CPU is stopped, but peripherals (Timers, Serial Port, Interrupt system) continue to function using the system clock.
- Power consumption is significantly reduced (e.g., ~15-25% of active mode).
- Exited by any enabled interrupt or a hardware reset.
- Power-Down Mode:
- Entered by setting the PD bit in PCON.
- Oscillator is stopped. CPU and all peripherals are frozen.
- Internal RAM contents are preserved (voltage must be maintained).
- Offers the lowest power consumption (microamps range).
- Can only be exited by a hardware reset. Execution restarts from address 0000H.
These modes are crucial for battery-powered applications.
Group (C)
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Q.7 Draw and explain pin diagram of 8085 microprocessor.
(8085 माइक्रोप्रोसेसर के पिन आरेख को खींचे एवं व्याख्या करें | )
View Answer +
The 8085 is a 40-pin microprocessor. Its pins can be categorized:
- Address Bus (A8-A15): Pins 21-28. Unidirectional, carry the higher 8 bits of the memory/IO address.
- Data/Address Bus (AD0-AD7): Pins 12-19. Bidirectional and multiplexed. Carry the lower 8 bits of the address during the first T-state (when ALE is high) and then carry the 8 bits of data during subsequent T-states.
- Control and Status Signals: ALE, RD, WR, IO/M, S0, S1, READY (explained in Q5).
- Interrupts & Externally Initiated Signals: TRAP, RST 7.5, RST 6.5, RST 5.5, INTR, INTA, HOLD, HLDA, RESET IN, RESET OUT (explained in Q5).
- Serial I/O: SID (Serial Input Data), SOD (Serial Output Data).
- Clock Signals: X1, X2 (inputs for crystal oscillator), CLK OUT (output clock for peripherals).
- Power Supply: VCC (+5V, Pin 40), VSS (Ground, Pin 20).
OR (अथवा)
Explain the architecture of 8085 microprocessor and its operation.
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The architecture of the 8085 microprocessor consists of several key functional units connected by an internal data bus:
- Arithmetic Logic Unit (ALU): Performs arithmetic (add, subtract) and logical (AND, OR, XOR, rotate) operations.
- Accumulator (A): An 8-bit register that is part of the ALU. It stores one of the operands and holds the result of ALU operations.
- General Purpose Registers (B, C, D, E, H, L): Six 8-bit registers used for temporary data storage. Can be used in pairs (BC, DE, HL) as 16-bit registers.
- Program Counter (PC): A 16-bit register that holds the address of the *next* instruction to be fetched from memory.
- Stack Pointer (SP): A 16-bit register that points to the top of the stack memory area, used for temporary data storage and subroutine calls.
- Instruction Register & Decoder: Fetched instruction opcode is stored here and then decoded to determine the operation to be performed.
- Timing and Control Unit: Generates timing signals (clock cycles) and control signals (like RD, WR, ALE) to synchronize all operations.
- Flags Register: An 8-bit register containing 5 status flags (Sign, Zero, Auxiliary Carry, Parity, Carry) that reflect the result of the last ALU operation.
- Address/Data Buffers: Interface the internal bus with the external address and data buses (including multiplexing/demultiplexing AD0-AD7).
Operation: The 8085 operates in a fetch-decode-execute cycle.
- Fetch: The PC provides the address of the next instruction. The Timing & Control unit issues signals to read the instruction opcode from memory onto the data bus.
- Decode: The opcode is loaded into the Instruction Register and decoded by the Instruction Decoder.
- Execute: Based on the decoded instruction, the Timing & Control unit generates the necessary sequence of control signals to perform the operation (e.g., read data from memory, perform an ALU operation, write data to memory/IO). The PC is updated to point to the next instruction.
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